Data Clustering and Image Segmentation
School of Electrical Engineering, Korea University
The objective of clustering is to achieve compact representation by grouping similar data elements or tokens together into a category. In this tutorial, we first review fundamental concepts and tools for data clustering, such as gestalt properties, agglomerative and divisive clustering, k-means algorithm, and Gaussian mixture model. An important application of data clustering is image segmentation, in which pixels should be grouped according to their color, texture, motion features, or even their semantics. Image segmentation is applicable to various higher-level vision applications, such as action recognition, content-based image and video retrieval, targeted content replacement, and image and video summarization. It is hence important to develop efficient image and video segmentation techniques. However, image and video segmentation is challenging due to a variety of difficulties, including boundary ambiguity, cluttered background, occlusion, and non-rigid object deformation. In the second part of the tutorial, we discuss image and video segmentation techniques, which are actively researched in image processing and computer vision fields.
Chang-Su Kim received the Ph.D. degree in electrical engineering from Seoul National University with a Distinguished Dissertation Award in 2000. From 2000 to 2001, he was a Visiting Scholar with the Signal and Image Processing Institute, University of Southern California, Los Angeles. From 2001 to 2003, he coordinated the 3D Data Compression Group in National Research Laboratory for 3D Visual Information Processing in SNU. From 2003 and 2005, he was an Assistant Professor in the Department of Information Engineering, Chinese University of Hong Kong. In Sept. 2005, he joined the School of Electrical Engineering, Korea University, where he is now a Professor. His research topics include image processing and computer vision. In 2009, he received the IEEK/IEEE Joint Award for Young IT Engineer of the Year. In 2014, he received the Best Paper Award from Journal of Visual Communication and Image Representation (JVCI). He has published more than 240 technical papers in international journals and conferences. He served as an Editorial Board Member of JVCI and an Associate Editor of IEEE Transactions on Image Processing. He is a Senior Area Editor of JVCI.
Rethinking on memory hierarchy
Dr. Euicheol Lim
Research Fellow and leader of system architecture team in memory system lab, SK Hynix
Nowadays, ICT key players such as Google, Facebook, Microsoft and Amazon are steering toward to hyperscale cloud datacenter to provide emerging services. Especially, AI & Big data applications are leading this movement by the evolution of AI algorithm and computing infra. These new technologies and services are inducing the changes and enhancements of edge computing architecture as well as datacenter. And the advance of both edge and datacenter computing architecture is accelerating the expansion of innovative services like virtual personal assistant, auto driving car, AR/VR applications and so on. Specifically, edge computing will evolve toward to more energy efficient architecture while datacenter needs more computing performance and more cost effective cloud architecture. These architecture trends also impact on the memory hierarchy which has not been changed for a long time. Now is the time to prepare the revolutionary change in the memory architecture. In this session we are going to handle the expected memory hierarchy and the new memory solutions which are needed to fill the gap from current memory architecture. And the various research topics needed for these new memory solutions will be proposed as well.
Dr. Lim is a Research Fellow and leader of system architecture team in memory system lab, SK Hynix.
He received the B.S. degree and the M.S. degree from Yonsei University, Seoul, Korea, in 1993 and 1995, and the Ph.D. degree from Sungkyunkwan University, suwon, Korea in 2006. Dr.Lim joined SK Hynix in 2016 as a system architect in memory system lab. Before joining SK Hynix, he had been working as an SoC architect in Samsung Electronics and involved in the most Exynos mobile SOC’s architecture design. His recent interesting points are memory and storage system architecture with new media memory and memory system architecture for machine learning.
Brain-Machine Interfaces: Intersection of Neuroscience, Signal Processing, and Machine Learning
Toshihisa Tanaka, Ph. D
Department of Electrical and Electronic Engineering,
Tokyo University of Agriculture and Technology (TUAT)
This tutorial addresses a recent development of electroencephalogram (EEG)-based brain-machine interfaces (BMI) and focus on various aspects of BMI from neuroscience, signal processing, and machine learning perspective.
In particular, I would like to talk about how neuroscientific findings are used in feature extraction. Moreover, the talk includes fundamentals of EEG signals and typical brain responses such as event-related potentials (ERP), steady-state evoked potentials (SSEP), and event-related synchronization/desynchronization (ERS/ERD). I will exhibit some interesting demonstrations of recently developed BMI applications.
Toshihisa Tanaka received the B.E., the M.E., and the Ph.D. degrees from the Tokyo Institute of Technology in 1997, 2000, and 2002, respectively. From 2000 to 2002, he was a JSPS Research Fellow. From October 2002 to March 2004, he was a Research Scientist at RIKEN Brain Science Institute. In April 2004, he joined Department of Electrical and Electronic Engineering, the Tokyo University of Agriculture and Technology, where he is currently an Associate Professor. In 2005, he was a Royal Society visiting fellow at the Communications and Signal Processing Group, Imperial College London, U.K. From June 2011 to October 2011, he was a visiting faculty member in Department of Electrical Engineering, the University of Hawaii at Manoa.
His research interests include a broad area of signal processing and machine learning including brain and biomedical signal processing, brain-machine interfaces and adaptive systems. He is a co-editor of Signal Processing Techniques for Knowledge Extraction and Information Fusion (with Mandic, Springer), 2008.
He served as an associate editor and a guest editor of special issues in journals including Neurocomputing and IEICE Transactions on Fundamentals. Currently he serves as an associate editor of IEEE Transactions on Neural Networks and Learning Systems, Computational Intelligence and Neuroscience (Hindawi), and Advances in Data Science and Adaptive Analysis (World Scientific). Furthermore, he serves as a member-at-large, board of governors (BoG) of Asia-Pacific Signal and Information Processing Association (APSIPA). He was a chair of the Technical Committee on Biomedical Signal Processing, APSIPA. He is a senior member of IEEE, and a member of IEICE, APSIPA, and Society for Neuroscience.